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assists: use 32-bit PL apertures for RPU xparams/config - #858

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NoC address remapping can expose a PL peripheral through different apertures for the APU and RPU. The peripheral's reg property lists the APU aperture first, which can be above 4 GB, followed by an RPU-accessible 32-bit aperture.

The xparameters and configuration-structure generators currently always use the first reg entry. Consequently, an RPU BSP can receive a base address that its 32-bit address space cannot represent or access.

Add a common helper that, for an RPU-targeted PL peripheral whose first aperture is above 4 GB, selects the first subsequent reg entry with a base address within the 32-bit range. Preserve the first entry when no suitable aperture exists. Use the selected base and size consistently for xparameters defines and driver configuration structures, and continue additional base-address definitions after the selected entry to avoid duplicating it.

Defer CPU lookup until the node has multiple PL apertures and its initial address exceeds 32 bits, leaving the existing path unchanged for other processors and peripherals.

NoC address remapping can expose a PL peripheral through different apertures
for the APU and RPU. The peripheral's reg property lists the APU aperture
first, which can be above 4 GB, followed by an RPU-accessible 32-bit aperture.

The xparameters and configuration-structure generators currently always use
the first reg entry. Consequently, an RPU BSP can receive a base address that
its 32-bit address space cannot represent or access.

Add a common helper that, for an RPU-targeted PL peripheral whose first
aperture is above 4 GB, selects the first subsequent reg entry with a base
address within the 32-bit range. Preserve the first entry when no suitable
aperture exists. Use the selected base and size consistently for xparameters
defines and driver configuration structures, and continue additional
base-address definitions after the selected entry to avoid duplicating it.

Defer CPU lookup until the node has multiple PL apertures and its initial
address exceeds 32 bits, leaving the existing path unchanged for other
processors and peripherals.

Signed-off-by: Onkar Harsh <onkar.harsh@amd.com>
@zeddii

zeddii commented Oct 22, 2026

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The aperture selection reads correctly to me, and I like that the cpu lookup is
deferred until the node actually has multiple PL apertures with the first above
4 GB .. the non-RPU path comes out byte for byte unchanged, and the no-suitable-
aperture case falls back to entry 0 as you describe.

One thing worth folding before this goes in. The same four processor names are
already in this file:

# baremetalconfig_xlnx.py:608, in xlnx_generate_prop
if ip_name in ["psu_cortexr5", "psv_cortexr5", "psx_cortexr52", "cortexr52"]:
    pad = 1

and the new helper adds a second copy:

is_rpu = bool(cpu_ip_name) and cpu_ip_name[0] in (
    "psu_cortexr5", "psv_cortexr5", "psx_cortexr52", "cortexr52")

Both sites do the same thing to get there -- get_cpu_node(sdt, options) then
read xlnx,ip-name -- so a small helper would consolodate them.

def cpu_is_rpu(sdt, options):
    ip_name = get_cpu_node(sdt, options).propval('xlnx,ip-name', list)
    return bool(ip_name) and ip_name[0] in RPU_IP_NAMES

The reason I would rather not take two copies is that the list is visibly still
growing -- cortexr52 and psx_cortexr52 are later additions to what started
as the r5 names -- so the next part added gets put in one of them and not the
other, and the two answers disagree with nothing to catch it. Same thing we have
elsewhere where one fact is written down twice.

A module level constant with both sites reading it is enough if you would rather
not add the function.

Everything else I checked came out fine, for the record: get_cpu_node cannot
return None (it exits), and the parent #address-cells lookup in the new helper
is not a new failure mode since scan_reg_size already does it on its first two
lines.

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2 participants