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@OSCPU

Open Source Chip Project by University (OSCPU)

Let students design their own chips!

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  1. NutShell NutShell Public

    RISC-V SoC designed by students in UCAS

    Scala 1.6k 261

  2. ysyx-workbench ysyx-workbench Public

    Shell 183 245

  3. ysyx ysyx Public

    一生一芯的信息发布和内容网站

    HTML 140 6

  4. NutShell-doc NutShell-doc Public

    126 29

  5. ysyxSoC ysyxSoC Public

    Verilog 99 61

  6. yosys-sta yosys-sta Public

    Verilog 98 27

Repositories

Showing 10 of 27 repositories
  • NutShell Public

    RISC-V SoC designed by students in UCAS

    OSCPU/NutShell's past year of commit activity
    Scala 1,561 261 77 8 Updated Oct 27, 2026
  • chisel-playground Public
    OSCPU/chisel-playground's past year of commit activity
    Scala 73 31 0 0 Updated Oct 23, 2026
  • ysyxSoC Public
    OSCPU/ysyxSoC's past year of commit activity
    Verilog 99 61 1 0 Updated Oct 23, 2026
  • ysyx-e-exam-pre-check Public

    “一生一芯”入学答辩前置自检脚本

    OSCPU/ysyx-e-exam-pre-check's past year of commit activity
    Python 2 3 0 0 Updated Oct 17, 2026
  • ysyx-B-stage-exam-env-setup Public

    “一生一芯”B阶段结业考核环境配置脚本，当前适配2306和2407版本讲义的考核

    OSCPU/ysyx-B-stage-exam-env-setup's past year of commit activity
    Shell 0 3 3 3 Updated Oct 16, 2026
  • ysyx-workbench Public
    OSCPU/ysyx-workbench's past year of commit activity
    Shell 183 244 0 0 Updated Oct 14, 2026
  • archbench Public
    OSCPU/archbench's past year of commit activity
    C 15 4 1 0 Updated Jul 28, 2026
  • ysyx-verilogHDL-competition Public
    OSCPU/ysyx-verilogHDL-competition's past year of commit activity
    Makefile 0 0 0 0 Updated May 17, 2026
  • ysyx-d-stage-ci Public

    2407讲义D阶段CI流程

    OSCPU/ysyx-d-stage-ci's past year of commit activity
    Python 0 0 103 0 Updated Jan 9, 2026
  • yosys-sta Public
    OSCPU/yosys-sta's past year of commit activity
    Verilog 98 27 2 0 Updated Nov 12, 2025
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